Freescale Semiconductor /MKM33ZA5 /TMR2 /SCTRL

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Interpret as SCTRL

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)OEN 0 (0)OPS 0 (FORCE)FORCE 0 (VAL)VAL 0 (EEOF)EEOF 0 (MSTR)MSTR 0 (00)CAPTURE_MODE 0 (INPUT)INPUT 0 (IPS)IPS 0 (IEFIE)IEFIE 0 (IEF)IEF 0 (TOFIE)TOFIE 0 (TOF)TOF 0 (TCFIE)TCFIE 0 (TCF)TCF

OPS=0, CAPTURE_MODE=00, OEN=0

Description

Timer Channel Status and Control Register

Fields

OEN

Output Enable

0 (0): The external pin is configured as an input.

1 (1): The OFLAG output signal is driven on the external pin. Other timer groups using this external pin as their input see the driven value. The polarity of the signal is determined by OPS.

OPS

Output Polarity Select

0 (0): True polarity.

1 (1): Inverted polarity.

FORCE

Force OFLAG Output

VAL

Forced OFLAG Value

EEOF

Enable External OFLAG Force

MSTR

Master Mode

CAPTURE_MODE

Input Capture Mode

0 (00): Capture function is disabled

1 (01): Load capture register on rising edge (when IPS=0) or falling edge (when IPS=1) of input

2 (10): Load capture register on falling edge (when IPS=0) or rising edge (when IPS=1) of input

3 (11): Load capture register on both edges of input

INPUT

External Input Signal

IPS

Input Polarity Select

IEFIE

Input Edge Flag Interrupt Enable

IEF

Input Edge Flag

TOFIE

Timer Overflow Flag Interrupt Enable

TOF

Timer Overflow Flag

TCFIE

Timer Compare Flag Interrupt Enable

TCF

Timer Compare Flag

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